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李伟

姓名 李伟
性别
学校 西北工业大学
部门 微电子学院
学位 工学博士学位
学历 博士研究生毕业
职称 副高
联系方式 实用新型1875包写包过
邮箱 weili2019@nwpu.edu.cn
   
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个人经历 Personal experience 工作经历 2019年7月—至今,西北工业大学微电子学院副教授,硕导。

教育教学

教育教学 Education and teaching 招生信息 课题组研究经费充足,实验条件完善,欢迎具有微电子、电子信息、材料、化学等背景的学生报考硕士研究生。

荣誉获奖

科学研究 Scientific Research 目前主持国家自然科学基金青年项目和博士后科学基金面上项目各一项,主要研究方向有:1. 基于二维材料的新型存储器件和神经形态器件;2. 新型纳米低功耗器件设计及可靠性。

科学研究

学术成果 Academic Achievements 1. Wei Li, Qingrui Jia, Yumei Pan, Xi'an Chen, Yue Yin, Yupan Wu, Yucheng Wang, Shaoxi Wang, A T-shaped gate tunneling field effect transistor with negative capacitance, super-steep subthreshold swing, Nanotechnology, 32(39), (2021).2. Shaoxi Wang, Xi'an Chen, Yumei Pan, Qingrui Jia, Yue Yin, Yupan Wu, Yucheng Wang, Wei Li, Design of negative capacitance tunneling field effect transistor with dual-source U-shape channel, super-steep subthreshold swing and large on-state current, Superlattices and Microstructures, 155, (2021).3. Wei Li, Hongxia Liu, Shulong Wang and Shupeng Chen, Analog/RF performance of four different Tunneling FETs with the recessed channels, Superlattices and Microstructures, 100, 1238-1248, (2016).4. Wei Li, Hongxia Liu, Shulong Wang and Shupeng Chen, Reduced Miller capacitance in U-Shaped channel Tunneling FET by introducing heterogeneous gate dielectric, IEEE Electron Device Letters, 38(3), 403-406, (2017). 5. Wei Li, Hongxia Liu, Shulong Wang and Shupeng Chen, Design of high performance Si/SiGe heterojunction Tunneling FETs with a T-Shaped gate, Nanoscale Research Letters, 12(198), 1-8, (2017). 6. Wei Li, Hongxia Liu, Shulong Wang, Shupeng Chen and Qianqiong Wang, A high performance Ge/Si0.5Ge0.5/Si heterojunction dual sources tunneling transistor with a U-shaped channel, Superlattices and Microstructures, 106, 8-19, (2017). 7. Wei Li, Hongxia Liu, Shulong Wang, Shupeng Chen and Qianqiong Wang, The Programming Optimization of Capacitorless 1T DRAM Based on the Dual-Gate TFET, Nanoscale Research Letters, 12(524), 1-8, (2017). 8. Wei Li, Hongxia Liu, Shulong Wang, Shupeng Chen and Qianqiong Wang, The Optimization of Spacer Engineering for Capacitor-less DRAM Based on the Dual-gate Tunneling Transistor, Nanoscale Research Letters, 13(73), 1-9, (2018). 9. Wei Li, Hongxia Liu, Shulong Wang, Shupeng Chen, Tao Han and Kun Yang, Design and investigation of dopingless dual-gate tunneling transistor based on line tunneling, AIP Advances, 9, 045109-1-045109-7, (2019).

学术成果

综合介绍

李伟